Basic knowledge of SMT component packaging
From: Author:Mark Hardy Publish time:2021-09-08 16:01 Clicks:0
Packaging refers to connecting the circuit pins on the silicon chip to external joints with wires to connect with other devices.
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The packaging form refers to the housing for mounting semiconductor integrated circuit chips. It not only plays the role of mounting, fixing, sealing, protecting the chip and enhancing the electrothermal performance, but also connects to the pins of the package shell with wires through the contacts on the chip, and these pins pass through the wires on the printed circuit board. Connect with other devices to realize the connection between the internal chip and the external circuit. Because the chip must be isolated from the outside world to prevent impurities in the air from corroding the chip circuit and causing electrical performance degradation. On the other hand, the packaged chip is also easier to install and transport.
The packaging is mainly divided into DIP dual in-line and SMD chip packaging. In terms of structure, the package has experienced the earliest transistor TO (such as TO-89, TO92) package development to the dual in-line package, and then PHILIP company developed a small SOP package, and then gradually derived SOJ (J type Lead small outline package), TSOP (thin small outline package), VSOP (very small outline package), SSOP (reduced SOP), TSSOP (thin reduced SOP) and SOT (small outline transistor), SOIC (small outline Integrated circuits) etc.
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